1. Field of the Invention
The present invention relates to a display synchronization signal generation apparatus and method in an analog video signal receiver, and more particularly, to a display synchronization signal generation apparatus and method that make it possible to display a state image irrespective of changes of horizontal and vertical frequencies of received analog video signals.
2. Description of the Related Art
An analog video signal receiver can receive analog video signals such as composite video burst synchronization (CVBS) signals, S-video signals, and component signals.
The CVBS signals can be received through a tuner included in the analog video signal receiver or through a video cassette recorder (VCR) connection terminal. The S-video signals can be input to the analog video signal receiver through a terminal that can be connected to a device such as an S-video home system (S-VHS) VCR or a digital versatile disc (DVD) that has S-video output. Each of the S-video signals consists of a luminance (Y) component signal and a color (C) component signal. The component signals take the form of RGB (Red, Green, Blue) signals, or Y/Pb/Pr or Y/Cb/Cr signals, and can be input to the analog video signal receiver through a terminal connectable to a device such as a computer.
Horizontal and vertical frequencies of these analog video signals may be changed by their environment. Particularly in the case of VCRs, changes of the horizontal and vertical frequencies of the analog video signals are significantly dependent on recording method and deck speed.
In the analog video signal receiver, horizontal and vertical frequencies of video signals to be displayed can be changed only by a predetermined vertical or horizontal mode. The predetermined vertical mode is defined in terms of the total number of lines per frame, and the predetermined horizontal mode is defined in terms of the total number of pixels per frame.
However, a frequency of a display pixel clock signal used in the analog video signal receiver is fixed. The display pixel clock signal is used to output received analog video signals according to timing suitable for a display device.
Since the analog video signal receiver uses a display pixel clock signal of a fixed frequency, when the horizontal and vertical frequencies of the received analog video signals are changed, discrepancy may be caused between transmission speeds of the received analog video signals and display speeds of the video signals to be displayed. Such discrepancy leads to an unstable display screen, such as a flickering or blank screen.